A signal processing circuit includes a generator, a transmission unit, a control unit, and a mode selector. The generator generates a process-required signal. The transmission unit transmits the process-required signal to a unit disposed after the transmission unit. The control unit supplies respective control signal to the generator and transmission unit. The control unit includes a reference clock generator constantly operated for generating a reference clock signal when the signal processing circuit is operated. The mode selector selects and shifts an operating mode of the signal processing circuit between a first mode and a second mode. In the first mode, the generator and transmission unit are supplied with respective normal control signal from the control unit for a normal operation. In the second mode, the generator is supplied with a control signal different from the normal control signal, and the transmission unit is supplied with the same normal control signal.