Disclosed is a novel static random access memory (SRAM) device. The SRAM device comprises a plurality of memory array layers vertically disposed one above another, a layer decoder circuit disposed on each memory array layer, a word line driver circuit disposed on each memory array layer, and a plurality of complementary bit line pairs wherein each complementary bit line pair extends vertically to couple a memory cell in each memory array layer. Each memory array layer comprises a plurality of memory cells and a word line disposed thereon. Each word line is connected to the plurality of memory cells disposed on its memory array layer. The number of memory cells in a layer corresponds to a predetermined memory page size. Each layer decoder circuit is configured to decode a portion of an SRAM address to select its memory array layer if the SRAM address corresponds to memory cells on its memory array layer. Each word line driver circuit is configured to drive the word line disposed on its memory array layer.