Invention Grant
US09001550B2 Blocking current leakage in a memory array 有权
阻塞存储器阵列中的电流泄漏

Blocking current leakage in a memory array
Abstract:
A method for blocking current leakage through defective memory cells in a memory array is provided. The memory cells include access devices and programmable resistance memory elements. The method includes identifying addresses of defective memory cells in the memory array, and applying a modifying bias condition to modify the defective memory cells at the identified addresses. The modifying bias condition causes the defective memory cells to transform into a current blocking condition. The method also includes storing the identified addresses in a redundancy table of addresses. An automatic test system includes a device tester adapted to identify addresses of defective memory cells in a memory array in an integrated circuit under test, and to apply a modifying bias condition to modify the defective memory cells at the identified addresses.
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