Invention Grant
US09003202B2 Memory control device, semiconductor memory device, memory system, and memory control method
有权
存储器控制装置,半导体存储器件,存储器系统和存储器控制方法
- Patent Title: Memory control device, semiconductor memory device, memory system, and memory control method
- Patent Title (中): 存储器控制装置,半导体存储器件,存储器系统和存储器控制方法
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Application No.: US13257644Application Date: 2010-04-05
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Publication No.: US09003202B2Publication Date: 2015-04-07
- Inventor: Takahiko Sugahara , Tetsuo Furuichi , Ikuo Yamaguchi , Takashi Oshikiri
- Applicant: Takahiko Sugahara , Tetsuo Furuichi , Ikuo Yamaguchi , Takashi Oshikiri
- Applicant Address: JP Osaka-shi
- Assignee: MegaChips Corporation
- Current Assignee: MegaChips Corporation
- Current Assignee Address: JP Osaka-shi
- Agency: Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2009-105041 20090423
- International Application: PCT/JP2010/056156 WO 20100405
- International Announcement: WO2010/122895 WO 20101028
- Main IPC: G06F21/00
- IPC: G06F21/00 ; G06F21/72

Abstract:
A technique for improving data security is provided. To be specific, in a memory system including an information processing apparatus and a semiconductor memory device, the semiconductor memory device has an interface section that transmits, to the information processing apparatus, data read out from a memory core according to a plurality of communication protocols having different signal transmission/reception methods. Based on a switch command inputted from the information processing apparatus, a communication protocol selection section inputs, to the interface section, a selection signal for selecting a particular communication protocol from the plurality of communication protocols.
Public/Granted literature
- US20120023338A1 MEMORY CONTROL DEVICE, SEMICONDUCTOR MEMORY DEVICE, MEMORY SYSTEM, AND MEMORY CONTROL METHOD Public/Granted day:2012-01-26
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