Invention Grant
- Patent Title: Fault-driven scan chain configuration for test-per-clock
- Patent Title (中): 故障驱动的扫描链配置用于每个时钟测试
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Application No.: US13919998Application Date: 2013-06-17
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Publication No.: US09003248B2Publication Date: 2015-04-07
- Inventor: Janusz Rajski , Jedrzej Solecki , Jerzy Tyszer , Grzegorz Mrugalski
- Applicant: Mentor Graphics Corporation
- Applicant Address: US OR Wilsonville
- Assignee: Mentor Graphics Corporation
- Current Assignee: Mentor Graphics Corporation
- Current Assignee Address: US OR Wilsonville
- Main IPC: G01R31/28
- IPC: G01R31/28 ; G01R31/3177 ; G01R31/3185

Abstract:
Aspects of the invention relate to using fault-driven techniques to generate scan chain configurations for test-per-clock. A plurality of test cubes that detect a plurality of faults are first generated. Scan chains for loading specified bits of the test cubes are then assigned to a stimuli group. From the plurality of test cubes, a test cube that detects a large number of faults that do not propagate exclusively to scan chains in the stimuli group is selected. One or more scan chains that are not in the stimuli group and are needed for observing the large number of faults are assigned to a compacting group. The number of scan chains either in the compacting group or in both of the compacting group and the stimuli group may be limited to a predetermined number.
Public/Granted literature
- US20140372820A1 Fault-Driven Scan Chain Configuration For Test-Per-Clock Public/Granted day:2014-12-18
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