Invention Grant
- Patent Title: Methods to produce high density, multilayer printed wiring boards from parallel-fabricated circuits and filled vias
- Patent Title (中): 从并联制造电路和填充通孔制造高密度多层印刷电路板的方法
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Application No.: US12521558Application Date: 2007-12-28
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Publication No.: US09003648B2Publication Date: 2015-04-14
- Inventor: Ken Holcomb
- Applicant: Ken Holcomb
- Applicant Address: US CA San Diego
- Assignee: Ormet Circuits, Inc.
- Current Assignee: Ormet Circuits, Inc.
- Current Assignee Address: US CA San Diego
- Agency: The Law Office of Jane K. Babin, Professional Corporation
- Agent Jane K. Babin
- International Application: PCT/US2007/026460 WO 20071228
- International Announcement: WO2008/105867 WO 20080904
- Main IPC: H05K3/36
- IPC: H05K3/36 ; H05K3/46 ; H05K3/38 ; H05K3/40

Abstract:
The invention provides methods to mass laminate and interconnect high density interconnect circuit layers fabricated through parallel processing. Invention methods employ an inside-out interconnection strategy that eliminates plating of vias and provides defect-free outer circuit layers. Conductive paste and via layers are also key features of the invention.
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