Invention Grant
- Patent Title: Semiconductor package
- Patent Title (中): 半导体封装
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Application No.: US14202075Application Date: 2014-03-10
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Publication No.: US09013034B2Publication Date: 2015-04-21
- Inventor: Kazutaka Takagi
- Applicant: Kabushiki Kaisha Toshiba
- Applicant Address: JP Minato-ku
- Assignee: Kabushiki Kaisha Toshiba
- Current Assignee: Kabushiki Kaisha Toshiba
- Current Assignee Address: JP Minato-ku
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2013-085233 20130415
- Main IPC: H01L23/06
- IPC: H01L23/06 ; H01L23/48 ; H01L23/043 ; H01L23/047
Abstract:
A semiconductor package, wherein, in bonding of members constituting the semiconductor package, by using bonding layers containing copper and a low-melting-point metal such as tin, the bonding is performed in a temperature range where the occurrence of warpage or distortion of the members is suppressed, and after the bonding, a high melting point is obtained; and by configuring the members so that all the surfaces of the members which become bonding surfaces of bonding layers are parallel to each other, all the thickness directions of the bonding layers are aligned to be in the same direction, and during the formation of the bonding layers, the pressing direction is set to be one-way direction which is the direction of laminating the members.
Public/Granted literature
- US20140306334A1 SEMICONDUCTOR PACKAGE Public/Granted day:2014-10-16
Information query
IPC分类:
