Invention Grant
US09013037B2 Semiconductor package with improved pillar bump process and structure
有权
半导体封装具有改进的柱状凸块工艺和结构
- Patent Title: Semiconductor package with improved pillar bump process and structure
- Patent Title (中): 半导体封装具有改进的柱状凸块工艺和结构
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Application No.: US13232780Application Date: 2011-09-14
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Publication No.: US09013037B2Publication Date: 2015-04-21
- Inventor: Yonggang Jin
- Applicant: Yonggang Jin
- Applicant Address: SG Singapore
- Assignee: STMicroelectronics Pte Ltd.
- Current Assignee: STMicroelectronics Pte Ltd.
- Current Assignee Address: SG Singapore
- Agency: Seed IP Law Group PLLC
- Main IPC: H01L23/34
- IPC: H01L23/34 ; H01L23/00 ; H01L23/31

Abstract:
A flip chip structure formed on a semiconductor substrate includes a first plurality of copper pillars positioned directly over, and in electrical contact with respective ones of a plurality of contact pads on the front face of the semiconductor substrate. A layer of molding compound is positioned on the front face of the substrate, surrounding and enclosing each of the first plurality of pillars and having a front face that is coplanar with front faces of each of the copper pillars. Each of a second plurality of copper pillars is positioned on the front face of one of the first plurality of copper pillars, and a solder bump is positioned on a front face of each of the second plurality of pillars.
Public/Granted literature
- US20130062764A1 SEMICONDUCTOR PACKAGE WITH IMPROVED PILLAR BUMP PROCESS AND STRUCTURE Public/Granted day:2013-03-14
Information query
IPC分类: