A semiconductor memory device includes a memory cell connected to a word line and a bit line, for storing and holding data, a word line driver circuit connected to the word line, a bit line precharge circuit connected to the bit line, and a peripheral control circuit. First power supply VDD is connected to the memory cell and the peripheral control circuit, and first power supply VDD is connected to word line driver circuit and bit line precharge circuit through switching element controlled by first control signal PD.