Invention Grant
- Patent Title: Sampling clock synchronizing apparatus, digital coherent receiving apparatus, and sampling clock synchronizing method
- Patent Title (中): 采样时钟同步装置,数字相干接收装置和采样时钟同步方法
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Application No.: US13345008Application Date: 2012-01-06
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Publication No.: US09014575B2Publication Date: 2015-04-21
- Inventor: Hisao Nakashima , Takeshi Hoshida
- Applicant: Hisao Nakashima , Takeshi Hoshida
- Applicant Address: JP Kawasaki
- Assignee: Fujitsu Limited
- Current Assignee: Fujitsu Limited
- Current Assignee Address: JP Kawasaki
- Agency: Fujitsu Patent Center
- Priority: JP2011-018847 20110131
- Main IPC: H04B10/06
- IPC: H04B10/06 ; H04L7/027 ; H04L7/033

Abstract:
In a sampling clock synchronizing apparatus, an A/D converter converts an analog signal to a digital signal based on a sampling clock, and a processor compensates a band limitation due to spectral narrowing by filter characteristics of characteristics opposite to those of the spectral narrowing with respect to a signal produced from the A/D converter subjected to the spectral narrowing, and detects a phase shift in the sampling clock based on a signal after the compensation of the spectral narrowing and synchronizes sampling timing.
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