A buffer controller includes a first write pointer generation module for generating a first write pointer that points to a first sequence of write locations in a buffer memory, that directs an input module to store a sequence of samples of a real-time signal in a buffer memory. A read pointer generation module generates a plurality of read pointers for a corresponding plurality of output modules, wherein each of the plurality of read pointers points to a sequence of read locations in the buffer memory, in a buffer order, that contain the sequence of samples.