Invention Grant
US09015522B2 Implementing DRAM failure scenarios mitigation by using buffer techniques delaying usage of RAS features in computer systems
有权
通过使用延迟RAS功能在计算机系统中使用的缓冲技术实现DRAM故障场景缓解
- Patent Title: Implementing DRAM failure scenarios mitigation by using buffer techniques delaying usage of RAS features in computer systems
- Patent Title (中): 通过使用延迟RAS功能在计算机系统中使用的缓冲技术实现DRAM故障场景缓解
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Application No.: US13693353Application Date: 2012-12-04
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Publication No.: US09015522B2Publication Date: 2015-04-21
- Inventor: Timothy J. Dell , Manoj Dusanapudi , Prasanna Jayaraman , Anil B. Lingambudi
- Applicant: International Business Machines Corporation
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Joan Pennington
- Main IPC: G06F11/00
- IPC: G06F11/00 ; G06F11/16

Abstract:
A method, system and computer program product are provided for implementing dynamic random access memory (DRAM) failure scenarios mitigation using buffer techniques delaying usage of RAS features in computer systems. A buffer is provided with a memory controller. Physical address data read/write failures are analyzed. Responsive to identifying predefined failure types for physical address data read/write failures, the buffer is used to selectively store and retrieve data.
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