Invention Grant
US09015656B2 Mapping vector representations onto a predicated scalar multi-threaded system 有权
将向量表示映射到预定义的标量多线程系统上

Mapping vector representations onto a predicated scalar multi-threaded system
Abstract:
A system implementing a method for generating code for execution based on a SIMT model with parallel units of threads is provided. The system identifies a loop within a program that includes vector processing. The system generates instructions for a thread that include an instruction to set a predicate based on whether the thread of a parallel unit corresponds to a vector element. The system also generates instructions to perform the vector processing via scalar operations predicated on the predicate. As a result, the system generates instructions to perform the vector processing but to avoid branch divergence within the parallel unit of threads that would be needed to check whether a thread corresponds to a vector element.
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