Invention Grant
- Patent Title: Method for forming interposers and stacked memory devices
- Patent Title (中): 用于形成插入件和堆叠式存储器件的方法
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Application No.: US14216517Application Date: 2014-03-17
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Publication No.: US09016552B2Publication Date: 2015-04-28
- Inventor: Paul Sweere
- Applicant: Sanmina Corporation
- Applicant Address: US CA San Jose
- Assignee: Sanmina Corporation
- Current Assignee: Sanmina Corporation
- Current Assignee Address: US CA San Jose
- Agency: Loza & Loza, LLP
- Agent Julio M. Loza
- Main IPC: B23K31/02
- IPC: B23K31/02 ; H01L23/00 ; H05K3/46 ; B23K1/00

Abstract:
Methods for forming a stacking interposer are provided that create a more compact and/or reliable interposer cavity. According to one method, a segmentation process that partially cuts a multi-cell, multi-layer PCB panel to a controlled depth along the internal walls/edges of a cavity region with each of the interposer cell sites defined within the PCB panel is used. The material within the cavity region is then removed (by routing) to a controlled depth to form the internal cavity for each interposer cell site. Pillars may then be removed from the PCB panel. As a result of the initial partial cuts of the internal walls of the cavity region, the corners of the cavities may have a square configuration for fitting over the top of a BGA/memory device (which has very square corners).
Public/Granted literature
- US20140263585A1 METHOD FOR FORMING INTERPOSERS AND STACKED MEMORY DEVICES Public/Granted day:2014-09-18
Information query
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