Invention Grant
US09020165B2 Pop/click noise reduction circuitry for power-up and power-down of audio output circuitry
有权
用于音频输出电路的上电和掉电的流行/点击降噪电路
- Patent Title: Pop/click noise reduction circuitry for power-up and power-down of audio output circuitry
- Patent Title (中): 用于音频输出电路的上电和掉电的流行/点击降噪电路
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Application No.: US13647897Application Date: 2012-10-09
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Publication No.: US09020165B2Publication Date: 2015-04-28
- Inventor: Eduardo Viegas
- Applicant: Silicon Laboratories Inc.
- Applicant Address: US TX Austin
- Assignee: Silicon Laboratories Inc.
- Current Assignee: Silicon Laboratories Inc.
- Current Assignee Address: US TX Austin
- Agency: Egan, Peterman & Enders LLP.
- Main IPC: H04B15/00
- IPC: H04B15/00 ; H03G3/34 ; H03F1/02 ; H03F1/30 ; H03F3/187 ; H03F3/45

Abstract:
Pop/clock noise reduction circuitry is disclosed for audio output circuitry. After audio output circuitry is enabled, reference voltage generator circuitry is then enabled to produce a reference voltage that ramps from a first voltage level to a second voltage level at a smooth rate. The ramping reference voltage is applied to the input of the audio output circuitry to reduce or prevent pop/click noise for the audio output circuitry. Further, negative offset control circuitry can also be used to provide a negative offset input to the audio output circuitry to remove initial step-up voltage levels that may exist at operational power-up for the audio output circuitry. Still further, current control circuitry can also be used that limits the available current flowing to the output node for the audio output circuitry, thereby further reducing and/or preventing potential pop/click noise in the audio output signals.
Public/Granted literature
- US20140098974A1 Pop/Click Noise Reduction Circuitry For Power-Up And Power-Down of Audio Output Circuitry Public/Granted day:2014-04-10
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