Invention Grant
- Patent Title: Method for manufacturing semiconductor device
- Patent Title (中): 制造半导体器件的方法
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Application No.: US14485649Application Date: 2014-09-12
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Publication No.: US09023717B2Publication Date: 2015-05-05
- Inventor: Kazuyuki Nakagawa , Shunichi Abe
- Applicant: Renesas Electronics Corporation
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: McDermott Will & Emery LLP
- Main IPC: H01L21/78
- IPC: H01L21/78 ; H01L21/66

Abstract:
To provide a semiconductor device having improved reliability. A method of manufacturing a semiconductor device according to one embodiment includes a step of cutting, in a dicing region arranged between two chip regions adjacent to each other, a wafer along an extending direction of the dicing region. The dicing region has therein a plurality of metal patterns in a plurality of columns. In the step of cutting the wafer, one or more of the columns of metal patterns formed in a plurality of columns are removed, and the metal patterns of the column(s) different from the above-mentioned one or more of the columns are not removed.
Public/Granted literature
- US20150079762A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE Public/Granted day:2015-03-19
Information query
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