Invention Grant
- Patent Title: Devices and stacked microelectronic packages with in-trench package surface conductors and methods of their fabrication
- Patent Title (中): 器件和具有沟槽封装表面导体的堆叠微电子封装及其制造方法
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Application No.: US14042628Application Date: 2013-09-30
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Publication No.: US09025340B2Publication Date: 2015-05-05
- Inventor: Jason R. Wright , Michael B. Vincent , Weng F. Yap
- Applicant: Jason R. Wright , Michael B. Vincent , Weng F. Yap
- Applicant Address: US TX Austin
- Assignee: Freescale Semiconductor, Inc.
- Current Assignee: Freescale Semiconductor, Inc.
- Current Assignee Address: US TX Austin
- Agent Sherry W. Schumm
- Main IPC: H05K7/10
- IPC: H05K7/10 ; H05K7/12 ; H05K1/11 ; H05K1/09 ; H05K3/12 ; H05K3/14 ; H05K3/26 ; H05K3/04 ; H05K3/06 ; H05K3/08

Abstract:
Embodiments of methods for forming microelectronic device packages include forming a trench on a surface of a package body between exposed ends of first and second device-to-edge conductors, and forming a package surface conductor in the trench to electrically couple the first and second device-to-edge conductors. In one embodiment, the package surface conductor is formed by first forming a conductive material layer over the package surface, where the conductive material layer substantially fills the trench, and subsequently removing portions of the conductive material layer from the package surface adjacent to the trench. In another embodiment, the package surface conductor is formed by dispensing one or more conductive materials in the trench between the first and second exposed ends (e.g., using a technique such as spraying, inkjet printing, aerosol jet printing, stencil printing, or needle dispense). Excess conductive material may then be removed from the package surface adjacent to the trench.
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