A method and system of a programmable resistive memory having a plurality of programmable resistive memory units. At least one of the programmable resistive memory units has at least one data cell and at least one reference cell. The data cell can have one programmable resistive element coupled to at least one diode as a program selector and also coupled to a bitline (BL). The reference cell can have a reference resistive element coupled to at least one reference diode as reference program selector and also coupled to a reference bitline (BLR). In one embodiment, the reference resistive element can have substantially the same material, structure, or shape of the programmable resistive element. In one embodiment, the reference diode can have the same material, structure, or shape of the diode serving as the program selector diode.