Invention Grant
- Patent Title: Arrival edge usage in timing analysis
- Patent Title (中): 时序分析中的抵达边缘使用
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Application No.: US13797926Application Date: 2013-03-12
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Publication No.: US09026965B2Publication Date: 2015-05-05
- Inventor: Hushrav Darabshah Mogal , Rupesh Nayak , Peivand Tehrani
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: Adams Intellex, PLC
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
A logic design is analyzed using static timing analysis and timing edge tracking for various nets within the logic design. Crosstalk analysis is performed on the logic design to evaluate timing impacts. To reduce pessimism of crosstalk analysis for a victim net, arrival edges are tracked for the victim net. The switching times of the aggressor net are compared to the edges of the victim net during crosstalk analysis.
Public/Granted literature
- US20140282317A1 ARRIVAL EDGE USAGE IN TIMING ANALYSIS Public/Granted day:2014-09-18
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