Invention Grant
US09027104B2 Instructions processors, methods, and systems to process secure hash algorithms
有权
指令处理器,方法和系统来处理安全散列算法
- Patent Title: Instructions processors, methods, and systems to process secure hash algorithms
- Patent Title (中): 指令处理器,方法和系统来处理安全散列算法
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Application No.: US13843141Application Date: 2013-03-15
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Publication No.: US09027104B2Publication Date: 2015-05-05
- Inventor: Gilbert M. Wolrich , Kirk S. Yap , Vinodh Gopal , James D. Guilford
- Applicant: Intel Corporation
- Applicant Address: US CA Santa Clara
- Assignee: Intel Corporation
- Current Assignee: Intel Corporation
- Current Assignee Address: US CA Santa Clara
- Agency: Vecchia Patent Agent, LLC
- Main IPC: G06F21/72
- IPC: G06F21/72 ; H04L9/06

Abstract:
A method of an aspect includes receiving an instruction. The instruction indicates a first source of a first packed data including state data elements ai, bi, ei, and fi for a current round (i) of a secure hash algorithm 2 (SHA2) hash algorithm. The instruction indicates a second source of a second packed data. The first packed data has a width in bits that is less than a combined width in bits of eight state data elements ai, bi, ci, di, ei, fi, gi, hi of the SHA2 hash algorithm. The method also includes storing a result in a destination indicated by the instruction in response to the instruction. The result includes updated state data elements ai+, bi+, ei+, and fi+ that have been updated from the corresponding state data elements ai, bi, ei, and fi by at least one round of the SHA2 hash algorithm.
Public/Granted literature
- US20140189369A1 Instructions Processors, Methods, and Systems to Process Secure Hash Algorithms Public/Granted day:2014-07-03
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