Invention Grant
- Patent Title: Methods of manufacturing semiconductor devices including terminals with internal routing interconnections
- Patent Title (中): 制造半导体器件的方法，包括具有内部路由互连的终端
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Application No.: US13850994Application Date: 2013-03-26
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Publication No.: US09029198B2Publication Date: 2015-05-12
- Inventor: Saravuth Sirinorakul , Suebphong Yenrudee
- Applicant: UTAC Thai Limited
- Applicant Address: TH Bangna Bangkok
- Assignee: UTAC Thai Limited
- Current Assignee: UTAC Thai Limited
- Current Assignee Address: TH Bangna Bangkok
- Agency: Haverstock & Owens LLP
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L23/498 ; H01L23/48 ; H01L21/78 ; H01L23/00 ; H01L23/31
Abstract:
A method of fabricating a semiconductor package includes forming a plurality of terminals on a sheet carrier, molding the sheet carrier with a first molding compound, creating electrical paths for a first routing layer, plating the first routing layer, placing dice on the first routing layer, encapsulating the dice with a second molding compound, removing at least a portion of the sheet carrier, and singulating the package from other packages.
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