Invention Grant
- Patent Title: Method of fabricating semiconductor package
- Patent Title (中): 制造半导体封装的方法
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Application No.: US13971136Application Date: 2013-08-20
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Publication No.: US09029203B2Publication Date: 2015-05-12
- Inventor: Pang-Chun Lin , Yueh-Ying Tsai , Yong-Liang Chen
- Applicant: Siliconware Precision Industries Co., Ltd.
- Applicant Address: TW Taichung
- Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee: Siliconware Precision Industries Co., Ltd.
- Current Assignee Address: TW Taichung
- Agency: Mintz Levin Cohn Ferris Glovsky and Popeo, P.C.
- Agent Peter F. Corless; Steven M. Jensen
- Priority: TW100137485A 20111017
- Main IPC: H01L21/44
- IPC: H01L21/44 ; H01L21/48 ; H01L23/31 ; H01L23/498 ; H01L23/00

Abstract:
This disclosure provides a semiconductor package and a method of fabricating the same. The semiconductor package includes an insulating layer; a plurality of traces and connection pads disposed in the insulating layer and protruded from the insulating layer; a plurality of bumps formed on the plurality of traces; a semiconductor chip disposed on the bumps; and an encapsulant formed on the insulating layer to encapsulate the semiconductor chip, the plurality of bumps, traces and connection pads. When the encapsulant is formed, voids can be prevented from being generated in the traces and the connection pads and thus the yield of process is significantly increased.
Public/Granted literature
- US20130344661A1 METHOD OF FABRICATING SEMICONDUCTOR PACKAGE Public/Granted day:2013-12-26
Information query
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