Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13704113Application Date: 2010-06-14
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Publication No.: US09030014B2Publication Date: 2015-05-12
- Inventor: Takeshi Kawamura
- Applicant: Takeshi Kawamura
- Applicant Address: JP Kanagawa
- Assignee: Renesas Electronics Corporation
- Current Assignee: Renesas Electronics Corporation
- Current Assignee Address: JP Kanagawa
- Agency: Sughrue Mion, PLLC
- International Application: PCT/JP2010/060050 WO 20100614
- International Announcement: WO2011/158319 WO 20111222
- Main IPC: H01L29/40
- IPC: H01L29/40 ; H01L21/768 ; H01L21/8234 ; H01L23/485 ; H01L23/528 ; H01L23/532 ; H01L29/78 ; H01L23/48

Abstract:
An upper surface of a plug (PL1) is formed so as to be higher than an upper surface of an interlayer insulating film (PIL) by forming the interlayer insulating film (PIL) on a semiconductor substrate (1S), completing a CMP method for forming the plug (PL1) inside the interlayer insulating film (PIL), and then, making the upper surface of the interlayer insulating film (PIL) to recede. In this manner, reliability of connection between the plug (PL1) and a wiring (W1) in a vertical direction can be ensured. Also, the wiring (W1) can be formed so as not to be embedded inside the interlayer insulating film (PIL), or a formed amount by the embedding can be reduced.
Public/Granted literature
- US20130082393A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2013-04-04
Information query
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