Invention Grant
US09030518B2 Clock signal generating circuit, image forming apparatus, and clock signal generating method of clock signal generating circuit
有权
时钟信号发生电路，图像形成装置和时钟信号发生电路的时钟信号产生方法
- Patent Title: Clock signal generating circuit, image forming apparatus, and clock signal generating method of clock signal generating circuit
- Patent Title (中): 时钟信号发生电路，图像形成装置和时钟信号发生电路的时钟信号产生方法
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Application No.: US14190277Application Date: 2014-02-26
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Publication No.: US09030518B2Publication Date: 2015-05-12
- Inventor: Shintaro Kawamura
- Applicant: Shintaro Kawamura
- Applicant Address: JP Tokyo
- Assignee: Ricoh Company, Ltd.
- Current Assignee: Ricoh Company, Ltd.
- Current Assignee Address: JP Tokyo
- Agency: IPUSA, PLLC
- Priority: JP2013-041618 20130304
- Main IPC: B41J2/435
- IPC: B41J2/435 ; H03K3/00 ; H03K21/02 ; H03K5/15
Abstract:
A clock signal generating circuit that generates a clock signal, the clock signal generating circuit including a clock signal generator configured to generate a reference clock signal; and a plurality of dividers to which the reference clock signal is to be input. A division ratio of at least one of the plurality of dividers varies based on division ratio data that defines the division ratio of the at least one of the plurality of dividers. The division ratio data represents a value that fluctuates around reference division ratio data with respect to time.
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