Invention Grant
US09030792B2 Overvoltage protection method using exposed device supply rail 有权
使用外露设备电源轨的过压保护方法

Overvoltage protection method using exposed device supply rail
Abstract:
A semiconductor device may be protected from over-voltages via a comparator-controlled, high-current FET coupled to the semiconductor device output and between circuit devices that carry high voltages. A three-terminal, N-channel field effect transistor (FET) may have its source coupled to the output of the semiconductor device to be protected from over voltage. The FET drain may be connected to the load to be driven by the semiconductor device. A transistor, or other voltage comparator, may be configured and connected in order to compare the voltage on the FET drain to a Vmax reference voltage. When a voltage on the FET drain exceeds Vmax, the comparator output may shut down the FET, thereby isolating the semiconductor device, which is connected to the FET source, from the overvoltage on the FET drain.
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