Invention Grant
- Patent Title: Adjusting program and erase voltages in a memory device
- Patent Title (中): 调整程序和擦除存储器件中的电压
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Application No.: US14150568Application Date: 2014-01-08
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Publication No.: US09030874B2Publication Date: 2015-05-12
- Inventor: Seiichi Aritome
- Applicant: Micron Technology, Inc.
- Applicant Address: US ID Boise
- Assignee: Micron Technology, Inc.
- Current Assignee: Micron Technology, Inc.
- Current Assignee Address: US ID Boise
- Agency: Fletcher Yoder, P.C.
- Main IPC: G11C16/04
- IPC: G11C16/04 ; G11C16/16 ; H01L27/02 ; H01L27/115

Abstract:
A system and apparatus for adjusting threshold program and erase voltages in a memory array, such as a floating gate memory array, for example. One such method includes applying a first voltage level to a first edge word line of a memory block string and applying a second voltage level to a second edge word line of the memory block string. Such a method might also include applying a third voltage level to non-edge word lines of the memory block string.
Public/Granted literature
- US20140119121A1 ADJUSTING PROGRAM AND ERASE VOLTAGES IN A MEMORY DEVICE Public/Granted day:2014-05-01
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