Invention Grant
US09030877B2 Memory cell arrangement, method for controlling a memory cell, memory array and electronic device 有权
存储单元布置,用于控制存储单元的方法,存储器阵列和电子设备

Memory cell arrangement, method for controlling a memory cell, memory array and electronic device
Abstract:
In an embodiment of the invention, a memory cell arrangement includes a substrate and at least one memory cell including a charge storing memory cell structure and a select structure. The memory cell arrangement further includes a first doping well, a second doping well and a third doping well arranged within the substrate, wherein the charge storing memory cell structure is arranged in or above the first doping well, the first doping well is arranged within the second doping well, and the second doping well is arranged within the third doping well. The memory cell arrangement further includes a control circuit coupled with the memory cell and configured to control the memory cell such that the charge storing memory cell structure is programmed or erased by charging or discharging the charge storing memory cell structure via at least the first doping well.
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