Invention Grant
- Patent Title: Semiconductor device
- Patent Title (中): 半导体器件
-
Application No.: US13766424Application Date: 2013-02-13
-
Publication No.: US09035351B2Publication Date: 2015-05-19
- Inventor: Tatsuya Naito
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP Kawasaki
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP Kawasaki
- Priority: JP2010-210105 20100917
- Main IPC: H01L29/06
- IPC: H01L29/06 ; H01L29/08 ; H01L29/739 ; H01L29/40

Abstract:
A semiconductor device having a p base region and an n+ emitter region that come into contact with an emitter electrode and are selectively provided in a surface layer of an n− drift layer. A gate electrode is provided on a portion of the front surface of the n− drift layer which is interposed between the n+ emitter regions, with a gate insulating film interposed therebetween. In some exemplary embodiments, an n+ buffer layer and a p collector layer which have a higher impurity concentration than the n− drift layer are sequentially provided on a surface of the n− drift layer opposite to the front surface on which the n+ emitter region is provided. The impurity concentration of the n+ buffer layer is equal to or greater than 7×1016 cm−3 and equal to or less than 7×1017 cm−3. Accordingly, it is possible to obtain high field decay resistance.
Public/Granted literature
- US20130153955A1 SEMICONDUCTOR DEVICE Public/Granted day:2013-06-20
Information query
IPC分类: