Invention Grant
- Patent Title: Semiconductor device and method of manufacturing the same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US14174122Application Date: 2014-02-06
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Publication No.: US09035376B2Publication Date: 2015-05-19
- Inventor: Mutsumi Kitamura , Michiya Yamada , Tatsuhiko Fujihira
- Applicant: FUJI ELECTRIC CO., LTD.
- Applicant Address: JP
- Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee: FUJI ELECTRIC CO., LTD.
- Current Assignee Address: JP
- Agency: Rossi, Kimms & McDowell LLP
- Priority: JP2013-026592 20130214
- Main IPC: H01L29/94
- IPC: H01L29/94 ; H01L21/338 ; H01L21/336 ; H01L29/06

Abstract:
A semiconductor device and method of manufacturing the semiconductor device is disclosed in which the tradeoff relationship between the Eoff and the turning OFF dV/dt is improved at a low cost using a trench embedding method. The method comprises a step of forming a parallel pn layer that is a superjunction structure using a trench embedding method and a step of ion implantation into an upper part of an n type semiconductor layer, i.e., an n type column, forming a high concentration n type semiconductor region. This method improves the trade-off relationship between the Eoff and the turning OFF dV/dt as compared with a high concentration n type semiconductor region formed of an epitaxial layer. This method achieves shorter process time and lower cost in manufacturing because it eliminates the redundant repeating of steps performed in the conventional method of forming a superjunction structure through multi-stage epitaxial growth.
Public/Granted literature
- US20140225217A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME Public/Granted day:2014-08-14
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