Invention Grant
US09035674B2 Structure and method for determining a defect in integrated circuit manufacturing process 有权
用于确定集成电路制造过程中的缺陷的结构和方法

Structure and method for determining a defect in integrated circuit manufacturing process
Abstract:
The present invention discloses a structure and method for determining a defect in integrated circuit manufacturing process, wherein the structure comprises a plurality of normal active areas formed in a plurality of first arrays and a plurality of defective active areas formed in a plurality of second arrays. The first arrays and second arrays are interlaced, and the defect is determined by monitoring a voltage contrast from a charged particle microscope image of the active areas.
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