Invention Grant
US09036411B2 Nonvolatile semiconductor memory device and data erase method thereof
有权
非易失性半导体存储器件及其数据擦除方法
- Patent Title: Nonvolatile semiconductor memory device and data erase method thereof
- Patent Title (中): 非易失性半导体存储器件及其数据擦除方法
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Application No.: US13483610Application Date: 2012-05-30
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Publication No.: US09036411B2Publication Date: 2015-05-19
- Inventor: Kiyotaro Itagaki
- Applicant: Kiyotaro Itagaki
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-124127 20110602
- Main IPC: G11C11/34
- IPC: G11C11/34 ; G11C16/14 ; G11C16/08 ; G11C16/04 ; G11C16/32

Abstract:
A nonvolatile semiconductor memory device according to an aspect includes a semiconductor substrate, a memory cell array, memory strings, drain side selection transistors, source side selection transistors, word lines, bit lines, a source line, a drain side selection gate line, a source side selection gate line, and a control circuit. The control circuit applies a first voltage to a selected bit line, thereby executing an erase operation on a selected memory string connected to the selected bit line, and the control circuit applies a second voltage to a non-selected bit line, thereby prohibiting the erase operation for the selected memory string connected to the non-selected bit line. The first voltage is more than the second voltage.
Public/Granted literature
- US20120307557A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND DATA ERASE METHOD THEREOF Public/Granted day:2012-12-06
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