Invention Grant
US09036425B2 Memory devices for reducing boosting charge leakage and systems including the same
有权
用于减少增加电荷泄漏的存储器件及包括其的系统
- Patent Title: Memory devices for reducing boosting charge leakage and systems including the same
- Patent Title (中): 用于减少增加电荷泄漏的存储器件及包括其的系统
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Application No.: US13229107Application Date: 2011-09-09
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Publication No.: US09036425B2Publication Date: 2015-05-19
- Inventor: Chi Weon Yoon , Sang-Wan Nam , Dong Hyuk Chae
- Applicant: Chi Weon Yoon , Sang-Wan Nam , Dong Hyuk Chae
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2010-0089240 20100913
- Main IPC: G11C16/06
- IPC: G11C16/06 ; G11C16/04 ; G11C16/34
Abstract:
A three-dimensional (3D) non-volatile memory includes a memory cell array and a merge driver configured to apply a merge voltage at the same level to a common source line and a bulk in the memory cell array.
Public/Granted literature
- US20120063235A1 Memory Devices For Reducing Boosting Charge Leakage And Systems Including The Same Public/Granted day:2012-03-15
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