Invention Grant
US09037833B2 High performance computing (HPC) node having a plurality of switch coupled processors 有权
具有多个交换耦合处理器的高性能计算(HPC)节点

High performance computing (HPC) node having a plurality of switch coupled processors
Abstract:
A High Performance Computing (HPC) node comprises a motherboard, a switch comprising eight or more ports integrated on the motherboard, and at least two processors operable to execute an HPC job, with each processor communicably coupled to the integrated switch and integrated on the motherboard.
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