Invention Grant
- Patent Title: Hardware assist thread for increasing code parallelism
- Patent Title (中): 用于增加代码并行性的硬件辅助线程
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Application No.: US13438087Application Date: 2012-04-03
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Publication No.: US09037837B2Publication Date: 2015-05-19
- Inventor: Ronald P. Hall , Hung Q. Le , Raul E. Silvera , Balaram Sinharoy
- Applicant: Ronald P. Hall , Hung Q. Le , Raul E. Silvera , Balaram Sinharoy
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agent Stephen J. Walder, Jr.; Parashos T. Kalaitzis
- Main IPC: G06F9/30
- IPC: G06F9/30 ; G06F9/38

Abstract:
Mechanisms are provided for offloading a workload from a main thread to an assist thread. The mechanisms receive, in a fetch unit of a processor of the data processing system, a branch-to-assist-thread instruction of a main thread. The branch-to-assist-thread instruction informs hardware of the processor to look for an already spawned idle thread to be used as an assist thread. Hardware implemented pervasive thread control logic determines if one or more already spawned idle threads are available for use as an assist thread. The hardware implemented pervasive thread control logic selects an idle thread from the one or more already spawned idle threads if it is determined that one or more already spawned idle threads are available for use as an assist thread, to thereby provide the assist thread. In addition, the hardware implemented pervasive thread control logic offloads a portion of a workload of the main thread to the assist thread.
Public/Granted literature
- US20120254594A1 Hardware Assist Thread for Increasing Code Parallelism Public/Granted day:2012-10-04
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