Invention Grant
- Patent Title: Circuit partitioning and trace assignment in circuit design
- Patent Title (中): 电路设计中的电路划分和跟踪分配
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Application No.: US13908732Application Date: 2013-06-03
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Publication No.: US09038013B2Publication Date: 2015-05-19
- Inventor: Awartika Pandey , Drazen Borkovic , Kenneth S. McElvain
- Applicant: Synopsys, Inc.
- Applicant Address: US CA Mountain View
- Assignee: Synopsys, Inc.
- Current Assignee: Synopsys, Inc.
- Current Assignee Address: US CA Mountain View
- Agency: HIPLegal LLP
- Agent Judith A. Szepesi
- Main IPC: G06F17/50
- IPC: G06F17/50

Abstract:
Methods and apparatuses for circuit design are described. In one embodiment, the method comprises determining a distribution of nets of a circuit, the distribution of the nets comprising numbers of blocks that each of the nets has in each of a plurality of partitions of the circuit in a partitioning solution, moving a first block of the circuit from a source partition to a destination partition to modify the partitioning solution, and updating the distribution of the nets after the moving.
Public/Granted literature
- US20130268905A1 Circuit Partitioning and Trace Assignment in Circuit Design Public/Granted day:2013-10-10
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