Invention Grant
- Patent Title: Electronic assembly apparatus and associated methods
- Patent Title (中): 电子装配装置及相关方法
-
Application No.: US13607481Application Date: 2012-09-07
-
Publication No.: US09040348B2Publication Date: 2015-05-26
- Inventor: Nagesh Vodrahalli , Jon M. Long
- Applicant: Nagesh Vodrahalli , Jon M. Long
- Applicant Address: US CA San Jose
- Assignee: Altera Corporation
- Current Assignee: Altera Corporation
- Current Assignee Address: US CA San Jose
- Agency: Law Offices of Maximilian R. Peterson
- Main IPC: H01L21/00
- IPC: H01L21/00 ; H01L21/44 ; H01L25/065 ; H01L23/00

Abstract:
A method of fabricating an electronic assembly includes fabricating first and second interconnects. The first interconnect is adapted to interconnect a first die to a substrate. The second interconnect is adapted to interconnect the first die to a second die. The method further includes assembling the first die, the second die, and the substrate together such that the first die is disposed above the substrate, and the second die is disposed below the first die.
Public/Granted literature
- US20130071969A1 ELECTRONIC ASSEMBLY APPARATUS AND ASSOCIATED METHODS Public/Granted day:2013-03-21
Information query
IPC分类: