Invention Grant
- Patent Title: Semiconductor device and method of manufacturing same
- Patent Title (中): 半导体装置及其制造方法
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Application No.: US13346906Application Date: 2012-01-10
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Publication No.: US09041056B2Publication Date: 2015-05-26
- Inventor: Toshitaka Miyata , Kanna Adachi , Shigeru Kawanaka
- Applicant: Toshitaka Miyata , Kanna Adachi , Shigeru Kawanaka
- Applicant Address: JP Tokyo
- Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee: KABUSHIKI KAISHA TOSHIBA
- Current Assignee Address: JP Tokyo
- Agency: Oblon, McClelland, Maier & Neustadt, L.L.P.
- Priority: JP2011-003907 20110112
- Main IPC: H01L29/16
- IPC: H01L29/16 ; H01L29/772 ; H01L29/08 ; H01L29/10 ; H01L29/78 ; H01L29/165 ; H01L29/66

Abstract:
According to one embodiment, a semiconductor device including: a substrate; a gate electrode formed above the substrate; a gate insulating film formed under the gate electrode; a channel layer formed under the gate insulating film by using a channel layer material; a source region and a drain region formed in the substrate so as to interpose the channel layer therebetween in a channel direction; and a source extension layer formed in the substrate between the channel layer and the source region so as to overlap a source-side end portion of the channel layer. The source extension layer forms a heterointerface with the channel layer. The heterointerface is a tunnel channel for carries.
Public/Granted literature
- US20120175637A1 SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SAME Public/Granted day:2012-07-12
Information query
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