Invention Grant
- Patent Title: Semiconductor integrated device
- Patent Title (中): 半导体集成器件
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Application No.: US13777951Application Date: 2013-02-26
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Publication No.: US09041113B2Publication Date: 2015-05-26
- Inventor: Chikashi Fuchigami
- Applicant: LAPIS SEMICONDUCTOR CO., LTD.
- Applicant Address: JP Tokyo
- Assignee: LAPIS Semiconductor Co., Ltd.
- Current Assignee: LAPIS Semiconductor Co., Ltd.
- Current Assignee Address: JP Tokyo
- Agency: Studebaker & Brackett PC
- Priority: JP2012-048870 20120306
- Main IPC: H01L27/02
- IPC: H01L27/02 ; H01L29/78 ; H01L23/31 ; H01L23/00

Abstract:
A semiconductor integrated device in which electrostatic discharge damage can be reliably prevented, includes a semiconductor substrate in which an electrostatic protection circuit including a second diffusion region surrounding a first diffusion region as a local region is formed in a main surface; a metal pad opposed to the main surface; and a conductive bump formed so as to face a top surface of the metal pad, wherein in a surface opposed to the metal pad of the conductive bump, a projection which is in contact with the metal pad is provided in a range opposed to the first diffusion region.
Public/Granted literature
- US20130234251A1 SEMICONDUCTOR INTEGRATED DEVICE Public/Granted day:2013-09-12
Information query
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