Invention Grant
- Patent Title: Semiconductor package and method for manufacturing the semiconductor package embedded with semiconductor chip
- Patent Title (中): 半导体封装和半导体封装的制造方法
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Application No.: US13604912Application Date: 2012-09-06
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Publication No.: US09041211B2Publication Date: 2015-05-26
- Inventor: Kenta Uchiyama
- Applicant: Kenta Uchiyama
- Applicant Address: JP Nagano
- Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee: SHINKO ELECTRIC INDUSTRIES CO., LTD.
- Current Assignee Address: JP Nagano
- Agency: IPUSA, PLLC
- Priority: JP2011-206550 20110921
- Main IPC: H01L23/48
- IPC: H01L23/48 ; H01L23/52 ; H01L23/31 ; H01L23/00 ; H01L21/56 ; H01L25/065 ; H01L23/498 ; H05K1/18 ; H01L23/538 ; H01L21/683 ; H05K3/46

Abstract:
A semiconductor package includes a first semiconductor chip including a target circuit surface and a side surface, a first sealing insulating layer including a first surface positioned toward the target circuit surface and a second surface positioned opposite to the first surface, the first sealing insulating layer sealing the target circuit surface and the side surface, a wiring layer formed on the first surface of the first sealing insulating layer, an insulating layer formed on the wiring layer, a second semiconductor chip mounted on the second surface of the first sealing insulating layer, and a second sealing insulating layer formed on the second surface and sealing the second semiconductor chip.
Public/Granted literature
- US20130069245A1 SEMICONDUCTOR PACKAGE AND METHOD FOR MANUFACTURING THE SEMICONDUCTOR PACKAGE Public/Granted day:2013-03-21
Information query
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