Invention Grant

Semiconductor package and method for manufacturing the semiconductor package embedded with semiconductor chip
Abstract:
A semiconductor package includes a first semiconductor chip including a target circuit surface and a side surface, a first sealing insulating layer including a first surface positioned toward the target circuit surface and a second surface positioned opposite to the first surface, the first sealing insulating layer sealing the target circuit surface and the side surface, a wiring layer formed on the first surface of the first sealing insulating layer, an insulating layer formed on the wiring layer, a second semiconductor chip mounted on the second surface of the first sealing insulating layer, and a second sealing insulating layer formed on the second surface and sealing the second semiconductor chip.
Information query
Patent Agency Ranking
0/0