Invention Grant
US09041220B2 Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device
有权
具有层叠存储元件的半导体器件和将存储元件堆叠在半导体器件上的方法
- Patent Title: Semiconductor device having stacked memory elements and method of stacking memory elements on a semiconductor device
- Patent Title (中): 具有层叠存储元件的半导体器件和将存储元件堆叠在半导体器件上的方法
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Application No.: US13766218Application Date: 2013-02-13
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Publication No.: US09041220B2Publication Date: 2015-05-26
- Inventor: Brian M. Henderson , Shiqun Gu
- Applicant: Qualcomm Incorporated
- Applicant Address: US CA San Diego
- Assignee: QUALCOMM Incorporated
- Current Assignee: QUALCOMM Incorporated
- Current Assignee Address: US CA San Diego
- Agency: Muncy, Geissler, Olds & Lowe, P.C.
- Main IPC: H01L23/498
- IPC: H01L23/498 ; H01L21/50 ; H01L25/065 ; H01L25/18 ; H01L23/48 ; H01L23/525
Abstract:
A semiconductor device includes a die coupled to a substrate, a first memory device coupled to a surface of the die opposite the substrate and a coupling device coupled between the surface of the die opposite the substrate and a second memory device such that the second memory device at least partially overlaps the first memory device. Also disclosed is method of mounting first and second memory devices on a die in an at least partially overlapping manner.
Public/Granted literature
Information query
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