Invention Grant
- Patent Title: Localization of failure in high density test structure
- Patent Title (中): 高密度试验结构故障定位
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Application No.: US13348549Application Date: 2012-01-11
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Publication No.: US09041409B1Publication Date: 2015-05-26
- Inventor: Kevin T. Look
- Applicant: Kevin T. Look
- Applicant Address: US CA San Jose
- Assignee: XILINX, INC.
- Current Assignee: XILINX, INC.
- Current Assignee Address: US CA San Jose
- Agent Kevin T. Cuenot
- Main IPC: G01R31/08
- IPC: G01R31/08 ; G01R31/26 ; G01R31/28
Abstract:
An integrated circuit structure can include a plurality of solder bumps coupled in series forming a chain and a plurality of diodes, wherein each diode is coupled to one of the plurality of solder bumps. The integrated circuit structure also can include a first pad coupled to the solder bump of the plurality of solder bumps at an end of the chain. The first pad can be configured to provide a test current responsive to application of a forward bias voltage to each diode of the plurality of diodes.
Public/Granted literature
- US2567853A Process of vulcanizing rubber and product thereof Public/Granted day:1951-09-11
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