Invention Grant
- Patent Title: Stacked semiconductor packages
- Patent Title (中): 堆叠半导体封装
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Application No.: US13934942Application Date: 2013-07-03
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Publication No.: US09042115B2Publication Date: 2015-05-26
- Inventor: Heung-Kyu Kwon , Min-Ok Na , Sung-Woo Park , Ji-Hyun Park , Su-Min Park
- Applicant: Heung-Kyu Kwon , Min-Ok Na , Sung-Woo Park , Ji-Hyun Park , Su-Min Park
- Applicant Address: KR Gyeonggi-Do
- Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee: SAMSUNG ELECTRONICS CO., LTD.
- Current Assignee Address: KR Gyeonggi-Do
- Agency: Harness, Dickey & Pierce, P.L.C.
- Priority: KR10-2009-0126345 20091217; KR10-2010-0052827 20100604
- Main IPC: H01R12/16
- IPC: H01R12/16 ; H01L23/498 ; H01L21/56 ; H01L23/31 ; H01L23/552 ; H01L23/00 ; H01L25/10 ; H01L25/18 ; H01L23/48

Abstract:
An apparatus includes a first substrate having a first land and a second substrate having a second land. A first molding compound is disposed between the first substrate and the second substrate. A first semiconductor chip is disposed on the first substrate and in contact with the first molding portion. A first connector contacts the first land and a second connector contacts the second land. The second connector is disposed on the first connector. A volume of the second connector is greater than a volume of the first connector. A surface of the first semiconductor chip is exposed. The first molding compound is in contact with the second connector, and at least a portion of the second connector is surrounded by the first molding compound.
Public/Granted literature
- US20130292828A1 STACKED SEMICONDUCTOR PACKAGES Public/Granted day:2013-11-07
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