A method and system for a programmable resistive memory to improve yield and reliability has a plurality of programmable resistive units. Each programmable resistive unit can have at least one programmable resistive cell. Each programmable resistive cell can have a programmable resistive element with a first end coupled to a first supply voltage line and a second end coupled to at least one diode serving as program selector. Each diode can have at least first and second terminals with first and second types of dopants, with the second terminal being coupled to a second supply voltage line. The first and second terminals of the diode can be fabricated from source/drain of MOS in a well for MOS devices or fabricated on the same polysilicon structure.