Invention Grant
- Patent Title: Optimizing a cache back invalidation policy
- Patent Title (中): 优化缓存无效化策略
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Application No.: US13723345Application Date: 2012-12-21
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Publication No.: US09043556B2Publication Date: 2015-05-26
- Inventor: Ganesh Balakrishnan , Anil Krishna
- Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION
- Applicant Address: US NY Armonk
- Assignee: International Business Machines Corporation
- Current Assignee: International Business Machines Corporation
- Current Assignee Address: US NY Armonk
- Agency: Yudell Isidore PLLC
- Agent Wenjie Li
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F13/00 ; G06F13/28 ; G06F12/08 ; G06F12/12

Abstract:
A method, a system and a computer program product for enhancing a cache back invalidation policy by utilizing least recently used (LRU) bits and presence bits in selecting cache-lines for eviction. A cache back invalidation (CBI) utility evicts cache-lines by using presence bits to avoid replacing a cache-line in a lower level cache that is also present in a higher level cache. Furthermore, the CBI utility selects the cache-line for eviction from an LRU group. The CBI utility ensures that dormant cache-lines in the higher level caches do not retain corresponding presence bits set in the lower level caches by unsetting the presence bits in the lower level cache when a line is replaced in the higher level cache. Additionally, when a processor core becomes idle, the CBI utility invalidates the corresponding higher level cache by unsetting the corresponding presence bits in the lower level cache.
Public/Granted literature
- US20130111139A1 Optimizing a Cache Back Invalidation Policy Public/Granted day:2013-05-02
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