Invention Grant
- Patent Title: Apparatus and method for testing a memory
- Patent Title (中): 用于测试存储器的装置和方法
-
Application No.: US13909671Application Date: 2013-06-04
-
Publication No.: US09043663B2Publication Date: 2015-05-26
- Inventor: Katsuhiko Minotani , Takahiro Osada , Hirokazu Ohta
- Applicant: FUJITSU LIMITED
- Applicant Address: JP Kawasaki
- Assignee: FUJITSU LIMITED
- Current Assignee: FUJITSU LIMITED
- Current Assignee Address: JP Kawasaki
- Agency: Staas & Halsey LLP
- Priority: JP2012-130260 20120607
- Main IPC: G11C29/00
- IPC: G11C29/00 ; G11C29/08 ; G11C29/10 ; G11C29/42 ; G11C29/04

Abstract:
An apparatus is equipped with a storage device including an error correction circuit. The apparatus performs a test of the storage device according to a predetermined testing procedure, and records a time-point at which error correction of the storage device has been performed by the error correction circuit during performance of the test. The apparatus determines, with predetermined accuracy, a first position within the storage device on which the error correction has been performed, based on a test speed at which the test is performed, a time-period from the time-point to current time, and a second position within the storage device on which the test is being performed at the current time. Then, the apparatus performs the test predetermined times on a range included in the storage device and including the first position, according to a testing procedure that has been used at the time-point.
Public/Granted literature
- US20130332784A1 APPARATUS AND METHOD FOR TESTING A MEMORY Public/Granted day:2013-12-12
Information query