Invention Grant
- Patent Title: Wiring and manufacturing method thereof, semiconductor device comprising said wiring, and dry etching method
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Application No.: US12009520Application Date: 2008-01-18
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Publication No.: US09045831B2Publication Date: 2015-06-02
- Inventor: Hideomi Suzawa , Koji Ono
- Applicant: Hideomi Suzawa , Koji Ono
- Applicant Address: JP
- Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee: Semiconductor Energy Laboratory Co., Ltd.
- Current Assignee Address: JP
- Agency: Husch Blackwell LLP
- Priority: JP11-206954 19990722
- Main IPC: H01L21/302
- IPC: H01L21/302 ; C23F4/00 ; H01L21/28 ; H01L21/3205 ; H01L21/3213 ; H01L21/768 ; H01L23/528 ; H01L23/532 ; H01L27/12 ; H01L29/423 ; H01L29/49 ; H01L29/786
Abstract:
A dry etching method for forming tungsten wiring having a tapered shape and having a large specific selectivity with respect to a base film is provided. If the bias power density is suitably regulated, and if desired portions of a tungsten thin film are removed using an etching gas having fluorine as its main constituent, then the tungsten wiring having a desired taper angle can be formed.
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