Invention Grant
- Patent Title: Prefetching across page boundaries in hierarchically cached processors
- Patent Title (中): 在分级缓存的处理器中预取页面边界
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Application No.: US13689696Application Date: 2012-11-29
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Publication No.: US09047198B2Publication Date: 2015-06-02
- Inventor: Hari S. Kannan , Pradeep Kanapathipillai , Brian P. Lilly , Perumal R. Subramoniam , Mahnaz Sadoughi-Yarandi
- Applicant: Apple Inc.
- Applicant Address: US CA Cupertino
- Assignee: Apple Inc.
- Current Assignee: Apple Inc.
- Current Assignee Address: US CA Cupertino
- Agency: Meyertons, Hood, Kivlin, Kowert & Goetzel, P.C.
- Agent Rory D. Rankin
- Main IPC: G06F12/00
- IPC: G06F12/00 ; G06F12/08 ; G06F13/00 ; G06F13/28 ; G06F9/26 ; G06F9/34 ; G06F12/10

Abstract:
Processors and methods for preventing lower level prefetch units from stalling at page boundaries. An upper level prefetch unit closest to the processor core issues a preemptive request for a translation of the next page in a given prefetch stream. The upper level prefetch unit sends the translation to the lower level prefetch units prior to the lower level prefetch units reaching the end of the current page for the given prefetch stream. When the lower level prefetch units reach the boundary of the current page, instead of stopping, these prefetch units can continue to prefetch by jumping to the next physical page number provided in the translation.
Public/Granted literature
- US20140149632A1 PREFETCHING ACROSS PAGE BOUNDARIES IN HIERARCHICALLY CACHED PROCESSORS Public/Granted day:2014-05-29
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