Provided is a drive circuit including: an image supply section for supplying an image to be displayed on a liquid crystal panel (2); a command issuing section for issuing a command that instructs an image displayed on the liquid crystal panel (2) to be updated; a low-speed oscillation circuit (13) for supplying a low-speed clock signal (L-CLK); a high-speed oscillation circuit (8) for supplying a high-speed clock signal (H-CLK) higher in frequency than the low-speed clock signal (L-CLK); image outputting means for supplying, to the liquid crystal panel (2), the image from the image supplying means, the image outputting means being driven by the high-speed clock signal (H-CLK); and a logic section (10) for controlling, in accordance with the command issued by the command issuing section, whether or not to cause the high-speed oscillation circuit (8) to operate, the logic section (10) being driven by the low-speed clock signal (L-CLK).