A thin film transistor array panel according to an exemplary embodiment of the present invention includes a substrate; a gate line disposed on the substrate; a gate insulating layer disposed on the gate line; a semiconductor disposed on the gate insulating layer; a data line disposed on the semiconductor and including a source electrode; a drain electrode disposed on the semiconductor and facing the source electrode; a first electrode disposed on the gate insulating layer; a protection electrode disposed on the data line; a passivation layer disposed on the first electrode and the protection electrode; and a second electrode disposed on the passivation layer, wherein the protection electrode comprises the same material as the first electrode.