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US09048255B2 Apparatus and method for power MOS transistor 有权
功率MOS晶体管的装置和方法

Apparatus and method for power MOS transistor
Abstract:
A method comprises forming a first trench and a second trench, depositing a dielectric material in a lower portion of the first trench, depositing a gate electrode material in the second trench and an upper portion of the first trench, forming a first N+ region and a second N+ region through an ion implantation process, wherein the first N+ region and the second N+ region are on opposite sides of the first trench and forming an accumulation layer along a sidewall of the second trench.
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