Invention Grant
- Patent Title: Apparatus and method for power MOS transistor
- Patent Title (中): 功率MOS晶体管的装置和方法
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Application No.: US14527488Application Date: 2014-10-29
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Publication No.: US09048255B2Publication Date: 2015-06-02
- Inventor: Chun-Wai Ng , Hsueh-Liang Chou , Po-Chih Su , Ruey-Hsin Liu
- Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
- Applicant Address: TW Hsin-Chu
- Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
- Current Assignee Address: TW Hsin-Chu
- Agency: Slater & Matsil, L.L.P.
- Main IPC: H01L29/66
- IPC: H01L29/66 ; H01L21/336

Abstract:
A method comprises forming a first trench and a second trench, depositing a dielectric material in a lower portion of the first trench, depositing a gate electrode material in the second trench and an upper portion of the first trench, forming a first N+ region and a second N+ region through an ion implantation process, wherein the first N+ region and the second N+ region are on opposite sides of the first trench and forming an accumulation layer along a sidewall of the second trench.
Public/Granted literature
- US20150064868A1 Apparatus and Method for Power MOS Transistor Public/Granted day:2015-03-05
Information query
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